Flexible Electronics News

Imec Launches University Consortium Around Next-Gen Chips

CMOS 2.0 will provide advanced, versatile 3D stacked platforms that push the boundaries of compute performance.

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By: Rachel Klemovitch

Assistant Editor

Imec has launched a first-of-its-kind consortium with 26 European university groups that will jointly work on the technology roadmap beyond CMOS scaling (CMOS 2.0).  This initiative will focus on design automation and chip architecture research for the next generation of chips. The consortium will benefit from the NanoIC pilot line, turning academic insights into industry-focused innovations.  CMOS 2.0 refers to a new paradigm, introduced by imec, that expands the chipmaking toolbox b...

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